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INTEGRATED CIRCUITS
74ABT16273 74ABTH16273 16-bit D-type flip-flop
Product specification Supersedes data of 1995 Sep 28 IC23 Data Handbook 1998 Feb 27
Philips Semiconductors
Philips Semiconductors
Product specification
16-bit D-type flip-flop
74ABT16273 74ABTH16273
FEATURES
* 16-bit D-type edge triggered flip-flops * Output capability: +64mA/-32mA * TTL input and output switching levels * Live insertion/extraction permitted * Power-up reset * 74ABTH16273 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
DESCRIPTION
The 74ABT16273 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. This part is a 16-bit edge triggered D-type flip-flop with non-inverting high drive outputs. This device can be used as two 8-bit flip-flops or one 16-bit flip-flop. When the clock (CP) goes High, the data on the D inputs is stored and the Q outputs display the stored data. This device also features a master reset (MR) that resets all flip-flops to the Low state when MR is set to the Low state. Two options are available, 74ABT16273 which does not have the bus-hold feature and 74ABTH16273 which incorporates the bus-hold feature.
* Latch-up protection exceeds 500mA per JEDEC Std 17 * ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN ICCH ICCL PARAMETER Propagation delay An to Bn or Bn to An Input capacitance Quiescent supply current su ly CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 5.0V VI = 0V or VCC Outputs High; VCC = 5.5V Outputs low; VCC = 5.5V TYPICAL 2.5 2.0 4 200 8 UNIT ns pF A mA
ORDERING INFORMATION
PACKAGES 48-Pin Plastic SSOP Type III 48-Pin Plastic TSSOP Type II 48-Pin Plastic SSOP Type III 48-Pin Plastic TSSOP Type II TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74ABT16273 DL 74ABT16273 DGG 74ABTH16273 DL 74ABTH16273 DGG NORTH AMERICA BT16273 DL BT16273 DGG BH16273 DL BH16273 DGG DWG NUMBER SOT370-1 SOT362-1 SOT370-1 SOT362-1
LOGIC SYMBOL
47 46 44 43 41 40 38 37
PIN DESCRIPTION
PIN NUMBER 1, 24 SYMBOL 1MR, 2MR 1Q0-1Q7 2Q0-2Q7 1D0-1D7 2D0-2D7 1CP, 2CP GND VCC NAME AND FUNCTION Master reset input (active-Low) Data outputs Data inputs Clock pulse input (active rising edge) Ground (0V) Positive supply voltage
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 48 1 CP MR 1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
2, 3, 5, 6, 8, 9, 11, 12,13, 14, 16, 17, 19, 20, 22, 23 47, 46, 44, 43, 41, 40, 38, 37, 36, 35, 33, 32, 30, 29, 27, 26 25, 48
2 36
3 35
5 33
6 32
8 30
9 29
11 27
12
4, 10, 15, 21, 28, 34, 39, 45
26
7, 18, 31, 42
2D0 2D21 2D2 2D3 2D4 2D5 2D6 2D7 25 24 CP MR 2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
13
14
16
17
19
20
22
23
SH00052
1998 Feb 27
2
853-1793 19027
Philips Semiconductors
Product specification
16-bit D-type flip-flop
74ABT16273 74ABTH16273
LOGIC SYMBOL (IEEE/IEC)
1MR CP 2MR 2CP 1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 2D0 2D1 2D2 2D3 2D4 2D5 2D6 2D7 1 48 24 25 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 2D 2 R1 C1 R2 C2 1D 1 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 1Q0 !Q1 1Q2 1Q3 1Q4 1Q5 1Q6
PIN CONFIGURATION
1MR 1Q0 !Q1 GND 1Q2 1Q3 VCC 1Q4 1Q5 GND 1Q6 1Q7 1Q7 2Q0 2Q0 2Q1 2Q1 GND 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 2Q2 2Q3 VCC 2Q4 2Q5 GND 2Q6 2Q7 2MR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 CP 1D0 1D1 GND 1D2 1D3 VCC 1D4 1D5 GND 1D6 1D7 2D0 2D1 GND 2D2 2D3 VCC 2D4 2D5 GND 2D6 2D7 2CP
SH00053
FUNCTION TABLE
Inputs nMR L H H H nCP X L nDX X h I X Output nQ0-nQ7 L H L Q0 operating mode Reset (clear) Load "1" Load "0" Retain state
SH00054
H = High voltage level h = high voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level I = Low voltage level one set-up time prior to the Low-to-High clock transition X = Don't care = Low-to-High clock transition Q0 = Output as it was
1998 Feb 27
3
Philips Semiconductors
Product specification
16-bit D-type flip-flop
74ABT16273 74ABTH16273
LOGIC DIAGRAM
nD0 nD1 nD2 nD3 nD4 nD5 nD6 nD7
nCP
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
D CP RD
Q
nMR
nQ0
nQ1
nQ2
nQ3
nQ4
nQ5
nQ6
nQ7
n = 1 or 2
SH00055
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IO OUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 Output in Off or High state Output in Low state DC output current Output in High state Storage temperature range -64 -65 to +150 C VI < 0 CONDITIONS RATING -0.5 to -7.0 -18 -1.2 to +7.0 -50 -0.5 to +5.5 128 mA UNIT V mA V mA V
DC output diode current DC output voltage3
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate; Outputs enabled Operating free-air temperature range 0 -40 4.5 0 2.0 0.8 -32 64 10 +85 LIMITS MAX 5.5 VCC V V V V mA mA ns/V C UNIT
1998 Feb 27
4
Philips Semiconductors
Product specification
16-bit D-type flip-flop
74ABT16273 74ABTH16273
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = +25C MIN VIK Input clamp voltage VCC = 4.5V; IIK = -18mA VCC = 4.5V; IOH = -3mA; VI = VIL or VIH VOH High-level output voltage VCC = 5.0V; IOH = -3mA; VI = VIL or VIH VCC = 4.5V; IOH = -32mA; VIL or VIH VOL VRST II Low-level output voltage Power-up output voltage3 Input leakage current g 74ABT16273 VCC = 4.5V; IOL = 64mA; VI = VIL or VIH VCC = 5.5V; IO = 1mA; VI = GND or VCC VCC = 5 5V; VI = VCC or GND 5.5V; VCC = 5.5V; VI = VCC or GND II Input leakage current In ut 74ABTH16273 VCC = 5.5V; VI = VCC VCC = 5.5V; VI = 0 Bus Hold B H ld current i t inputs4 t 74ABTH16273 Power-off leakage current output current1 Output High leakage current Quiescent supply current Additional supply current per input pin2 74ABT16273 Additional supply current per input pin2 74ABTH16273 VCC = 4.5V; VI = 0.8V VCC = 4.5V; VI = 2.0V VCC = 5.5V; VI = 0 to 5.5V IOFF IO ICEX ICCH ICCL ICC VCC= 0.0V; VO or VI t 4.5V VCC = 5.5V; VO = 2.5V VCC = 5.5V; VO = 5.5V; VI = GND or VCC VCC = 5.5V; Outputs High, VI = GND or VCC VCC = 5.5V; Outputs Low, VI = GND or VCC VCC = 5.5V; One input at 3.4V. Other inputs at VCC or GND VCC = 5.5V; One input at 3.4V. Other inputs at VCC or GND -50 35 -75 800 5.0 -70 5.0 0.2 8 5 100 -180 50 1 19 100 -50 100 -180 50 1 mA 19 100 A A mA A Control pins Data pins -2 -3 35 -75 A -5 2.5 3.0 2.0 TYP 0.9 2.9 3.4 2.4 0.42 0.13 0 1 0.1 0.01 0.01 0.55 0.55 1 1 1 MAX -1.2 2.5 3.0 2.0 0.55 0.55 1 1 1 V A A A A V Temp = -40C to +85C MIN MAX -1.2 V UNIT
IHOLD
ICC
0.2
1
1
mA
NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500; LIMITS SYMBOL PARAMETER WAVEFORM MIN tPLH tPHL tPHL fMAX Propagation delay nCP to nQx Propagation delay nMR to nQx Maximum clock frequency 1 2 1 1.5 1.2 1.9 150 Tamb = +25C VCC = +5.0V TYP 2.5 2.0 3.7 240 MAX 3.4 2.7 4.3 Tamb = -40 to +85 C VCC = +5.0V 0.5V MIN 1.5 1.2 1.9 150 MAX 4.0 3.0 5.3 ns ns MHz UNIT
1998 Feb 27
5
Philips Semiconductors
Product specification
16-bit D-type flip-flop
74ABT16273 74ABTH16273
AC SETUP REQUIREMENTS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25C VCC = +5.0V MIN tS(H) tS(L) th(H) th(L) tW(H) tW(L) tW(L) tREC Setup time, High or Low nDx to nCP Hold time, High or Low nDx to nCP Clock pulse width High or Low Master Reset pulse width, Low Recovery time nMR + nCP 3 3 1 2 2 2.0 2.0 0 0 3.3 3.3 3.3 2.0 TYP 1.0 1.0 -0.6 -0.6 1.2 1.0 1.1 0.0 Tamb = -40 to +85 C VCC = +5.0V 0.5V MIN 2.0 2.0 0 0 3.3 3.3 3.3 2.0 ns ns ns ns ns UNIT
AC WAVEFORMS
VM = 1.5V, VIN = GND to 2.7V
nDx 1/fMAX
nCP
VM tW(H) tPHL
VM tW(L)
VM 0V tPLH VOH
nCP
nQx
VM
VM VOL
SH00056
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
nMR
VM tw(L)
VM 0V tREC VM tPHL 0V VOH
nCP
nQx
VM VOL
SH00057
Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock Recovery Time
1998 Feb 27
6
EEEEEEEEE EEE E EEEEEEEEE EEE E EEEEEEEEE EEE E
VM VM VM VM ts(H) th(H) ts(L) th(L) VM VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
0V
0V
SH00058
Waveform 3. Data Setup and Hold Times
Philips Semiconductors
Product specification
16-bit D-type flip-flop
74ABT16273 74ABTH16273
TEST CIRCUIT AND WAVEFORM
VCC 90% NEGATIVE PULSE VIN D.U.T. RT CL RL POSITIVE PULSE VOUT VM 10% tTHL (tF) tTLH (tR) 90% VM tW 90% VM 10% 0V 10% 0V PULSE GENERATOR tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V)
Test Circuit for Outputs
10%
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS FAMILY Amplitude 74ABT16 3.0V Rep. Rate 1MHz tW 500ns tR 2.5ns tF 2.5ns
SH00059
1998 Feb 27
7
Philips Semiconductors
Product specification
16-bit D-type flip-flop
74ABT16273 74ABTH16273
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
1998 Feb 27
8
Philips Semiconductors
Product specification
16-bit D-type flip-flop
74ABT16273 74ABTH16273
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm
SOT362-1
1998 Feb 27
9
Philips Semiconductors
Product specification
74ABT16273 74ABTH16273
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-03489
Philips Semiconductors
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